1. Field of the Invention
The present invention relates to a semiconductor device having resistance against the influence of external noise on internal power source networks.
2. Background Information
As a result of the rapid development of microelectronics and digital technologies in recent years, the level of integration in semiconductor devices and the speed of the operating frequencies thereof have become ever higher. However, progress in high-level integration and faster operating frequencies is handicapped by a serious problem in the form of EMS (electromagnetic susceptibility), whereby a semiconductor device is influenced by noise from outside. Noise outside the semiconductor device gets for instance into power source network that supplies power to various functional units inside the semiconductor device and is transmitted to these functional units inside the semiconductor device. The noise propagated to the functional units affects signal lines and/or elements of the functional units and gives rise to malfunctions.
The propagation of noise from outside the semiconductor device is normally caused by noise currents. Noise currents flow into wiring having low impedance. Thus, when the impedance of the power source network in the semiconductor device is lower than the impedance of the wiring in the circuitry outside the semiconductor device, noise currents from outside the semiconductor device are drawn into the power source network of the semiconductor device. When noise currents flow into the power source network in the semiconductor device, power source voltage changes, affecting thereby signal lines and/or elements of the functional units.
There is therefore a pressing need for EMS countermeasures that allow shielding semiconductor devices against the influence of external noise.
JP-2002-270695-A discloses a method for implementing EMS countermeasures while preserving high-level integration and fast operating frequency in a semiconductor integrated circuit. The method disclosed in JP-2002-270695-A comprises the following steps: First, impedance information is extracted from power source network inside and outside a targeted semiconductor integrated circuit. Next, equivalent circuitry is generated from the extracted impedance information. External noise waveforms are supplied as input data for the equivalent circuitry, and the influence of noise on the semiconductor integrated circuit is analyzed. If as a result of the analysis it is judged that the semiconductor integrated circuit is influenced by external noise, external noise is absorbed for instance by introducing capacitors in the vicinity of power source terminals of the semiconductor integrated circuit, and/or by introducing countermeasure circuitry for eliminating noise, such as low pass filters.
Semiconductor integrated circuits usually operate at a plurality of predetermined frequencies. In the method of Patent Reference 1, however, the impedance of the power source network can only be extracted when the operating frequency is highest.
The semiconductor integrated circuit may be assumed to work for instance either at an operating frequency of “1 GHz” or of “300 MHz”. The impedance value of the power source network is proportional to the operating frequency, since parasitic inductance of the wiring is predominant. Thus, the impedance value of the power source network when the operating frequency is “1 GHz” is higher than the impedance value of the power source network when the operating frequency is “300 MHz”. When the semiconductor integrated circuit operates at a high frequency, such as “1 GHz”, some phenomena, such as clock disturbance or the like, occur in the semiconductor integrated circuit as a result of a frequency characteristic. When the impedance of the power source network is lower than the impedance value outside the semiconductor integrated circuit, as when the operating frequency is “300 MHz”, the power source network in the semiconductor integrated circuit is influenced by external noise outside the semiconductor integrated circuit. Thus, in the method of JP-2002-270695-A, external noise can be suppressed by introducing countermeasure circuitry, such as a low pass filter or the like, when the operating frequency is “1 GHz”; however, the method does not always afford a stable operation or eliminate phenomena such as internal clock disturbance, etc. At the operating frequency of “300 MHz”, also, because noise is absorbed by the countermeasure circuitry that is set for the “1 GHz” operating frequency, external noise cannot necessarily be efficiently suppressed.
Depending on the processing executed in the semiconductor integrated circuit, there are instances that differ as to whether suppression of external noise takes precedence over operative reliability, or whether operative reliability takes precedence over suppression of external noise. However, no technology has been proposed hitherto for changing such precedence to either requirement in accordance with the processing executed in the semiconductor integrated circuit.
Thus, it is an object of the present invention to provide a semiconductor device that allows dynamic switching between operating the semiconductor device normally, or increasing resistance against the influence of external noise on the power source network of the semiconductor device, for a plurality of operating frequencies. It is also an object of the present invention to provide a communications terminal and an automobile having such a semiconductor device.